Current events

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[edit] MC Data 2008, ETH

Workshop Website

[edit] Provenance and Scientific Workflows

J. Freire and C. Silva, Utah

http://www.vistrails.org

  • Workflows
    • paradigm for representing and managing data intensive and complex computations
    • systematically pacture provenance: automation, reproducibility, result sharing
  • Provenance Models
    • Retrospective: execution log -> data flows
    • Prospective: recipes for how to produce data (makefile) -> workflow itself
    • Causality graph
    • Annotations
  • Provenance Models: issue

[edit] IACAT 2008

[edit] Parallel Performance Issues from Multicore to Petascale

L.V. Kale

  • Barriers for scalable applications
    • load imbalance
    • Critical paths: dependency between computations spread across processors
    • bottlenecks: one processors holds things up

[edit] VSCSE Summer School 2008

[edit] Charm++ workshops

[edit] Advanced Charm++

[edit] Building Charm++

  • SMP-Aware
  • Build: 
    build <target> <version> <options> [charmc-options ...]
    • version
      • net-linux : ethernet
      • mpi-linux
    • options
      • ooc: out of core support
    • shared library --no-build-shared

http://charm.cs.uiuc.edu/autobuild/cur/

  • charmrun charmrun +p4 ./pgm
    • equivalent to mpirun
  • charmrun (batch mode) charmrun +p4 ++batch 2
    • Only few ssh connections at a time

[edit] Advanced messaging

  • Scheduler: FIFO
  • Prioritized execution

[edit] Advanced load balancing

[edit] Threads

  • Context switch cost: 1-10 µsecs
  • CthThreads: few µsecs latency
  • "isomalloc"
    • depends on unportable mmap

[edit] Structured dagger

[edit] Compilation techniques for partitioned global address space languages

K. Yelick http://titanium.cs.berkeley.edu/

[edit] Cell processors and Charm++

Cell processor

  • 8 core synergistic processor element (SPE)
  • Each SPE: DMA controller + LS + SPX (pipelines, registers etc)
  • No direct access to system memory
  • Local store (LS): 256 KB
  • DMA transactions to move data between system memory and LS

[edit] Fault tolerant AMPI

  • React to a fault
    • disk
    • in-memory
      • on local processor
      • on a remote buddy processor
    • message logging with fast recovery
  • Act before a fault
    • fault prediction
  • Processor evacuation
    • rewire reduction tree around a warned processor
    • load balance after an evacuation
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